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Disambiguation of "Zambreno, Joseph"

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Design and evaluation of a delay-based FPGA Physically Unclonable Function.

, , , , , and . ICCD, page 143-146. IEEE Computer Society, (2012)

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Stefanie Joseph

Virginia Joseph

Joseph Kugbe

Joseph Schilling

Joseph Herzog

 

Other publications of authors with the same name

Enhancing Compiler Techniques for Memory Energy Optimizations., , and . EMSOFT, volume 2491 of Lecture Notes in Computer Science, page 364-381. Springer, (2002)Design and Implementation of an FPGA Architecture for High-Speed Network Feature Extraction., , , , and . FPT, page 49-56. IEEE, (2007)An FPGA-based Hardware Accelerator for Iris Segmentation., , and . ReConFig, page 1-8. IEEE, (2018)k-NN text classification using an FPGA-based sparse matrix vector multiplication accelerator., , , , , and . EIT, page 257-263. IEEE, (2015)Exploring Area/Delay Tradeoffs in an AES FPGA Implementation., , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 575-585. Springer, (2004)An I/O Bandwidth-Sensitive Sparse Matrix-Vector Multiplication Engine on FPGAs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (1): 113-123 (2012)Towards Reverse Engineering Controller Area Network Messages Using Machine Learning., , and . WF-IoT, page 1-6. IEEE, (2020)Perf-Sat: Runtime Detection of Performance Saturation for GPGPU Applications., , and . ICPP Workshops, page 1-8. IEEE Computer Society, (2014)Parallelizing Latent Semantic Indexing using an FPGA-based architecture., and . ICCD, page 432-435. IEEE Computer Society, (2016)Cache design for mixed criticality real-time systems., , , , , and . ICCD, page 513-516. IEEE Computer Society, (2014)