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On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors.

, , and . HPCC, page 196-205. IEEE, (2009)

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Register Saturation in Superscalar and VLIW Codes.. CC, volume 2027 of Lecture Notes in Computer Science, page 213-228. Springer, (2001)Early Periodic Register Allocation on ILP Processors., and . Parallel Process. Lett., 14 (2): 287-313 (2004)Periodic register saturation in innermost loops., and . Parallel Comput., 35 (4): 239-254 (2009)Evaluating address register assignment and offset assignment algorithms., , , and . ACM Trans. Embed. Comput. Syst., 10 (3): 37:1-37:22 (2011)Going beyond Mean and Median Programs Performances., and . MCSoC, page 93-100. IEEE Computer Society, (2016)Efficient Method for Periodic Task Scheduling with Storage Requirement Minimization., and . COCOA, volume 5165 of Lecture Notes in Computer Science, page 438-447. Springer, (2008)Improving Load/Store Queues Usage in Scientific Computing., , and . ICPP, page 38-45. IEEE Computer Society, (2004)Code-size conscious pipelining of imperfectly nested loops., , and . MEDEA@PACT, page 49-55. ACM, (2007)On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors., , and . HPCC, page 196-205. IEEE, (2009)On the decidability of phase ordering problem in optimizing compilation., and . Conf. Computing Frontiers, page 147-156. ACM, (2006)