Author of the publication

Improving Load/Store Queues Usage in Scientific Computing.

, , and . ICPP, page 38-45. IEEE Computer Society, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Register Saturation in Superscalar and VLIW Codes.. CC, volume 2027 of Lecture Notes in Computer Science, page 213-228. Springer, (2001)Early Periodic Register Allocation on ILP Processors., and . Parallel Process. Lett., 14 (2): 287-313 (2004)On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors., , and . HPCC, page 196-205. IEEE, (2009)Code-size conscious pipelining of imperfectly nested loops., , and . MEDEA@PACT, page 49-55. ACM, (2007)Evaluating address register assignment and offset assignment algorithms., , , and . ACM Trans. Embed. Comput. Syst., 10 (3): 37:1-37:22 (2011)Periodic register saturation in innermost loops., and . Parallel Comput., 35 (4): 239-254 (2009)Going beyond Mean and Median Programs Performances., and . MCSoC, page 93-100. IEEE Computer Society, (2016)Efficient Method for Periodic Task Scheduling with Storage Requirement Minimization., and . COCOA, volume 5165 of Lecture Notes in Computer Science, page 438-447. Springer, (2008)Improving Load/Store Queues Usage in Scientific Computing., , and . ICPP, page 38-45. IEEE Computer Society, (2004)SIRALINA: efficient two-steps heuristic for storage optimisation in single period task scheduling., , and . J. Comb. Optim., 22 (4): 819-844 (2011)