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A K-Band 12.1-to-16.6GHz Subsampling ADPLL with 47.3fsrms Jitter Based on a Stochastic Flash TDC and Coupled Dual-Core DCO in 16nm FinFET CMOS.

, , , , , , , , , , , , , , and . ISSCC, page 451-453. IEEE, (2021)

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