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A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 168-170. IEEE, (2012)A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS., , , , , и . ISSCC, стр. 70-72. IEEE, (2012)A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O., , , , и . ISLPED, стр. 1-6. IEEE, (2017)8 GHz, 20mW, fast locking, fractional-N frequency synthesizer with optimized 3rd order, 3/5-bit IIR and 3rd order 3-bit-FIR noise shapers in 90nm CMOS., , , и . CICC, стр. 625-628. IEEE, (2004)A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleaving., , , , , , и . ESSCIRC, стр. 152-155. IEEE, (2009)A 1.8W High-Frequency SIMO Converter Featuring Digital Sensor-Less Computational Zero-Current Operation and Non-Linear Duty-Boost., , , , , , , , , и . ISSCC, стр. 186-187. IEEE, (2023)A K-Band 12.1-to-16.6GHz Subsampling ADPLL with 47.3fsrms Jitter Based on a Stochastic Flash TDC and Coupled Dual-Core DCO in 16nm FinFET CMOS., , , , , , , , , и 5 other автор(ы). ISSCC, стр. 451-453. IEEE, (2021)MIMO techniques for high data rate radio communications., , и . CICC, стр. 141-148. IEEE, (2008)A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control., , , , , , и . ESSCIRC, стр. 131-134. IEEE, (2011)A Cellular Multiband DTC-Based Digital Polar Transmitter With -153-dBc/Hz Noise in 14-nm FinFET., , , , , , , , , и 8 other автор(ы). IEEE J. Solid State Circuits, 55 (7): 1830-1841 (2020)