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Function-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture.

, , , , , and . VLSI Design, page 805-812. IEEE Computer Society, (2007)

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Function-Based Test Generation for (Non-Robust) Path Delay Faults Using the Launch-off-Capture Scan Architecture., , , , , and . ISQED, page 717-722. IEEE Computer Society, (2007)Function-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture., , , , , and . VLSI Design, page 805-812. IEEE Computer Society, (2007)A non-intrusive isolation approach for soft cores., and . DATE, page 27-32. EDA Consortium, San Jose, CA, USA, (2007)Isolation Techniques for Soft Cores., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1453-1466 (2008)Computer-Assisted Verification of an Algorithm for Concurrent Timestamps., , , , and . FORTE, volume 69 of IFIP Conference Proceedings, page 29-44. Chapman & Hall, (1996)