( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
SET and RESET pulse characterization in BJT-selected phase-change memories.

, , , , , , и . ISCAS (2), стр. 1270-1273. IEEE, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Niko Torelli

Bruno Remo Guidotti

Sauter Guido

Curt Guido

Isabella Guido

 

Другие публикации лиц с тем же именем

Automatic trimming procedure to enhance the accuracy of on-chip analog pulse generators., , и . ICICDT, стр. 119-122. IEEE, (2013)High-swing buffer for programmable resistive memories., , и . ICICDT, стр. 127-130. IEEE, (2013)Design of Maximum-Efficiency Integrated Voltage Doubler., , и . ISCAS, стр. 317-320. IEEE, (2007)A low-power low-voltage MOSFET-only voltage reference., , , , и . ISCAS (1), стр. 57-60. IEEE, (2004)A design strategy for area efficient high-order high-Q SC filters., , , и . ISCAS (1), стр. 85-88. IEEE, (2004)Design considerations on CMOS limiting amplifiers for wearable biomedical systems., , , и . ECCTD, стр. 294-297. IEEE, (2011)Enhanced voltage buffer compensation technique for two-stage CMOS operational amplifiers., , , и . ICECS, стр. 121-124. IEEE, (2016)A high dynamic range wideband CMOS phase angle detector for bioimpedance spectroscopy., , , и . ICECS, стр. 376-379. IEEE, (2012)A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications., , , , , , , , , и 3 other автор(ы). ESSCIRC, стр. 320-323. IEEE, (2017)An Error Control Code Scheme for Multilevel Flash Memories., , , и . MTDT, стр. 45-50. IEEE Computer Society, (2001)