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DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching.

, , , , , , , , and . ISSCC, page 256-257. IEEE, (2023)

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NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices., , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 92 fps and 2.56 mJ/Frame Computing-In-Memory-Based Human Pose Estimation Accelerator With Resource-Efficient Macro for Mobile Devices., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (6): 2921-2925 (June 2024)A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency., , , , , , , and . ISCAS, page 1-5. IEEE, (2023)DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching., , , , , , , , and . ISSCC, page 256-257. IEEE, (2023)An Energy-Efficient Deep Reinforcement Learning FPGA Accelerator for Online Fast Adaptation with Selective Mixed-precision Re-training., , , and . A-SSCC, page 1-3. IEEE, (2021)NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator., , , , , , and . COOL CHIPS, page 1-3. IEEE, (2024)DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell., , , , , , , , and . IEEE J. Solid State Circuits, 59 (1): 102-115 (January 2024)OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data., , , , , , and . HCS, page 1-21. IEEE, (2021)Low-power Autonomous Adaptation System with Deep Reinforcement Learning., , , and . AICAS, page 300-303. IEEE, (2022)A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System., , , , and . ISCAS, page 1-5. IEEE, (2023)