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Design of a flexible 2-D discrete wavelet transform IP core for JPEG2000 image coding in embedded imaging systems.

, , and . Signal Process., 86 (7): 1375-1399 (2006)

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Design of a flexible 2-D discrete wavelet transform IP core for JPEG2000 image coding in embedded imaging systems., , and . Signal Process., 86 (7): 1375-1399 (2006)Instruction set simulator generation using HARMLESS, a new hardware architecture description language., , , , and . SimuTools, page 24. ICST/ACM, (2009)Simulator generation using an automaton based pipeline model for timing analysis., , , , and . IMCSIT, page 657-664. IEEE, (2008)An Architecture Description Language for Embedded Hardware Platforms, , , and . Electronic Communications of the EASST, (October 2011)Embedded software development relies on various tools - compilers, simulators, execution time estimators - that encapsulate a more-or-less detailed knowledge of the target hardware platform. These tools can be costly to develop and maintain: significant benefits could be expected if they were automatically generated from models expressed in a dedicated modeling language. In contrast with Hardware Description Languages (HDLs), that focus on the internal structure and behavior of an electronic board of chip, Hardware Architecture Description Languages consider hardware as a platform for software execution. Such a platform will be described in terms of low-level programming interface (processor instruction set), resources (processing elements, memory and peripheral devices) and elementary services (arithmetic and logic operations, bus transactions). This paper gives an overview of HARMLESS (Hardware ARchitecture Modeling Language for Embedded Software Simulation), a new domain-specific language for modeling embedded hardware platforms. HARMLESS and its associated tools follow the Model-Driven Engineering philosophy: metamodeling and model transformations have been successfully applied to the automatic generation of processor simulators..