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An ASIC chip set for parallel fuzzy database mining., , , и . IEEE Micro, 16 (6): 60-67 (1996)3D system on chip memory interface based on modeled capacitive coupling interconnections., , , , , , , и . 3DIC, стр. 1-4. IEEE, (2010)Chip-to-chip communication based on capacitive coupling., , , , , , и . 3DIC, стр. 1-6. IEEE, (2009)EEG acquisition system based on active electrodes with common-mode interference suppression by Driving Right Leg circuit., , , и . EMBC, стр. 3169-3172. IEEE, (2015)A VLIW processor with reconfigurable instruction set for embedded applications., , , , , и . IEEE J. Solid State Circuits, 38 (11): 1876-1886 (2003)A VLSI array processor accelerator for k-NN classification., , и . ICPR, стр. 723-727. IEEE Computer Society, (1996)A system-on-chip for pressure-sensitive fabric., , , , и . CICC, стр. 413-416. IEEE, (2001)A 2D-DCT low-power architecture for H.261 coders., , , и . ICASSP, стр. 3271-3274. IEEE Computer Society, (1995)Low power techniques for flash memories., , и . ISCAS (4), стр. 494-497. IEEE, (2001)A smoothly upgradable approach to virtual emulation of HW/SW systems., , , и . RSP, стр. 83-89. IEEE Computer Society, (1996)