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From High-Level Synthesis to Bundled-Data Circuits., , , и . SAMOS, том 12471 из Lecture Notes in Computer Science, стр. 200-212. Springer, (2020)A High-Level Design Flow for Locally Body Biased Asynchronous Circuits., , и . VLSI-SoC, стр. 1-6. IEEE, (2021)Cross Layer Fault Simulations for Analyzing the Robustness of RTL Designs in Airborne Systems., , , , , , , , и . DDECS, стр. 1-4. IEEE, (2020)FPU Reduced Variable Precision in Time: Application to the Jacobi Iterative Method., , и . ISVLSI, стр. 170-175. IEEE, (2021)Cross-layer Approach to Assess FMEA on Critical Systems and Evaluate High-Level Model Realism., , , , , , , , и . VLSI-SoC, стр. 1-6. IEEE, (2021)A Generic CDC Modeling for Data Stability Verification., , , и . ICECS, стр. 1-4. IEEE, (2023)A Distributed Body-Biasing Strategy for Asynchronous Circuits., , , , , , , , и . VLSI-SoC, стр. 27-32. IEEE, (2019)Method for Data-Driven Pruning in Micropipeline Circuits., , , , , и . VLSI-SoC, стр. 1-6. IEEE, (2023)Formal Temporal Characterization of Register Vulnerability in Digital Circuits., , , и . ISVLSI, стр. 1-6. IEEE, (2023)Comparison of Synchronous and Asynchronous FIR Filter Architectures., , , , и . EBCCSP, стр. 1-8. IEEE, (2019)