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Integrating bio-sensing functions on CMOS chips., , , , , , и . APCCAS, стр. 548-551. IEEE, (2010)Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology., , , , , , , , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 339-351 (2016)Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage., и . ISCAS, стр. 1871-1874. IEEE, (2007)Robust and fault-tolerant circuit design for nanometer-scale devices and single-electron transistors., и . ISCAS (3), стр. 685-688. IEEE, (2004)Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants., , , , , , и . ISCAS, стр. 533-536. IEEE, (2009)Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity., , и . ISCAS (5), стр. 453-456. IEEE, (2003)A low-power, multichannel gated oscillator-based CDR for short-haul applications., , , и . ISLPED, стр. 107-110. ACM, (2005)Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library., , , , , и . DAC, стр. 1014-1019. ACM, (2011)Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors., , , и . DAC, стр. 42-47. ACM, (2012)Non-filamentary non-volatile memory elements as synapses in neuromorphic systems., , , , , , , , , и . NVMTS, стр. 1-6. IEEE, (2019)