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Disambiguation of "Abderazek, Ben A."

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Advanced Optimization and Design Issues of a 32-Bit Embedded Processor Based on Produced Order Queue Computation Model.

, , and . EUC (1), page 16-22. IEEE Computer Society, (2008)

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Ben Elsner

Ben Maathuis

Ben Möbius

Ben Zerkowitz

Ben Schröter

 

Other publications of authors with the same name

High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core., , and . J. Supercomput., 38 (1): 3-15 (2006)Advanced Optimization and Design Issues of a 32-Bit Embedded Processor Based on Produced Order Queue Computation Model., , and . EUC (1), page 16-22. IEEE Computer Society, (2008)Proposal and Design of a Parallel Queue Processor Architecture (PQP)., , , , and . IASTED PDCS, page 549-554. IASTED/ACTA Press, (2002)An Efficient Dynamic Switching Mechanism (DSM) for Hybrid Processor Architecture., , , and . EUC, volume 3824 of Lecture Notes in Computer Science, page 77-86. Springer, (2005)Single Instruction Dual-Execution Model Processor Architecture., , and . EUC (1), page 30-36. IEEE Computer Society, (2008)An Efficient Code Generation Algorithm for Code Size Reduction Using 1-Offset P-Code Queue Computation Model., , and . EUC, volume 4808 of Lecture Notes in Computer Science, page 196-208. Springer, (2007)Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core., , , and . EUC, volume 3824 of Lecture Notes in Computer Science, page 340-349. Springer, (2005)Queue Register File Optimization Algorithm for QueueCore Processor., , and . SBAC-PAD, page 169-176. IEEE Computer Society, (2007)Construction of Hybrid MPI-OpenMP Solutions for SMP Clusters., , , and . Inf. Media Technol., 1 (1): 45-57 (2006)Parallel Queue Processor Architecture Based on Produced Order Computation Model., , and . J. Supercomput., 32 (3): 217-229 (2005)