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ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.

S. Liu, J. Kuo, L. Tang, N. Huang, D. Tsai, M. Yang, and K. Wu. VLSI-DAT, page 1-7. IEEE, (2021)

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Kai-Yuan Wu

Chiang Liang

Chiang Mai

Joanna Chiang

Hsin-yi Chiang

Other publications of authors with the same name

Workload-aware lifetime Trojan based on statistical aging manipulation.T. Tseng, S. Wang, J. Chen, and K. Wu. DSC, page 159-165. IEEE, (2017)Re-synthesis for delay variation tolerance.S. Chang, C. Hsieh, and K. Wu. DAC, page 814-819. ACM, (2004)Using Path Features for Hardware Trojan Detection Based on Machine Learning Techniques.C. Yen, J. Tsai, and K. Wu. ISQED, page 1-8. IEEE, (2023)Identifying Good-Dice-in-Bad-Neighborhoods Using Artificial Neural Networks.C. Yang, C. Yen, T. Wang, C. Chen, M. Chern, Y. Chen, J. Lee, S. Kao, K. Wu, and M. Chao. VTS, page 1-7. IEEE, (2021)Test Generation for Defect-Based Faults of Scan Flip-Flops.Y. Nien, C. Li, P. Wu, Y. Wang, K. Wu, and M. Chao. VTS, page 1-7. IEEE, (2023)An Energy-Efficient Approximate Systolic Array Based on Timing Error Prediction and Prevention.N. Huang, W. Tseng, H. Chou, and K. Wu. VTS, page 1-7. IEEE, (2021)Lifetime Reliability Trojan Based on Exploring Malicious Aging.T. Tseng, S. Li, and K. Wu. ATS, page 74-79. IEEE, (2018)Aging-aware timing analysis and optimization considering path sensitization.K. Wu, and D. Marculescu. DATE, page 1572-1577. IEEE, (2011)Process variability-aware transient fault modeling and analysis.N. Miskov-Zivanov, K. Wu, and D. Marculescu. ICCAD, page 685-690. IEEE Computer Society, (2008)MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine.E. Taka, A. Arora, K. Wu, and D. Marculescu. ICFPT, page 96-105. IEEE, (2023)

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ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.

Please choose a person to relate this publication to

Kai-Yuan Wu

Chiang Liang

Chiang Mai

Joanna Chiang

Hsin-yi Chiang

Other publications of authors with the same name

Disambiguation

BibSonomy

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.

Please choose a person to relate this publication to

Kai-Yuan Wu

Chiang Liang

Chiang Mai

Joanna Chiang

Hsin-yi Chiang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.