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Using Task Recomputation During Application Mapping in Parallel Embedded Architectures., , and . CDES, page 29-35. CSREA Press, (2006)Hybrid-comp: A criticality-aware compressed last-level cache., , , and . ISQED, page 25-30. IEEE, (2018)The design and use of simplepower: a cycle-accurate energy estimation tool., , , and . DAC, page 340-345. ACM, (2000)Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression., , and . CODES+ISSS, page 87-92. ACM, (2005)A helper thread based dynamic cache partitioning scheme for multithreaded applications., , and . DAC, page 954-959. ACM, (2011)Locality-conscious workload assignment for array-based computations in MPSOC architectures., and . DAC, page 95-100. ACM, (2005)Soft error and energy consumption interactions: a data cache perspective., , , , and . ISLPED, page 132-137. ACM, (2004)Exploiting program hotspots and code sequentiality for instruction cache leakage management., , , , and . ISLPED, page 402-407. ACM, (2003)Estimating influence of data layout optimizations on SDRAM energy consumption., , , , , and . ISLPED, page 40-43. ACM, (2003)Reuse distance based performance modeling and workload mapping., , and . Conf. Computing Frontiers, page 193-202. ACM, (2012)