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A new cross contamination aware routing method with intelligent path exploration in digital microfluidic biochips.

, , , , and . DTIS, page 50-55. IEEE, (2013)

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Monotone bipartitioning problem in a planar point set with applications to VLSI., , , and . ACM Trans. Design Autom. Electr. Syst., 7 (2): 231-248 (2002)Double Patterning Lithography (DPL)-compliant layout construction (DCLC) with area-stitch usage tradeoff., , , and . VDAT, page 1-6. IEEE, (2016)A rule-based approach for minimizing power dissipation of digital circuits., , , , and . DDECS, page 237-242. IEEE, (2016)Digital microfluidic system: A new design for heterogeneous sample based integration of multiple DMFBs., , , and . ISCAS, page 1905-1909. IEEE, (2013)A new customized testing technique using a novel design of droplet motion detector for digital microfluidic Biochip systems., , , and . ICACCI, page 897-902. IEEE, (2013)Revisiting VLSI Interconnects in Deep Sub-Micron: Some Open Questions.. VLSI Design, page 615-620. IEEE Computer Society, (2005)Minimum-Congestion Placement for Y-interconnects: Some studies and observations., , , and . ISVLSI, page 73-80. IEEE Computer Society, (2007)A Group-Preferential Parallel-Routing Algorithm for Cross-Referencing Digital Microfluidic Biochips., , , and . ISVLSI, page 317-318. IEEE Computer Society, (2011)Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (11): 3345-3358 (2016)Delay Estimates for Graphene Nanoribbons: A Novel Measure of Fidelity and Experiments with Global Routing Trees., , , , and . ACM Great Lakes Symposium on VLSI, page 263-268. ACM, (2016)