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Disambiguation of "Benkrid, Khaled"

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A high level FPGA-based abstract machine for image processing.

, , , , and . J. Syst. Archit., 45 (10): 809-824 (1999)

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Soumia Benkrid

Khaled Bahbouh

Khaled Khdir

Khaled Alkharsah

Khaled Khatab

 

Other publications of authors with the same name

Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT., , and . ISSPA (2), page 283-286. IEEE, (2003)0-7803-7946-2.Efficient architecture and scheduling technique for pairwise sequence alignment., , and . SIGARCH Comput. Archit. News, 40 (4): 26-31 (2012)A high level FPGA-based abstract machine for image processing., , , , and . J. Syst. Archit., 45 (10): 809-824 (1999)Efficient FPGA hardware development: A multi-language approach., , and . J. Syst. Archit., 53 (4): 184-209 (2007)Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs., , and . FPT, page 356-359. IEEE, (2002)Dynamic partial reconfiguration implementation of the SVM/KNN multi-classifier on FPGA for bioinformatics application., , and . EMBC, page 7667-7670. IEEE, (2015)Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension., and . IEEE Trans. Very Large Scale Integr. Syst., 17 (5): 709-722 (2009)Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA., , and . FCCM, page 162-172. IEEE Computer Society, (2003)Rapid Prototyping of an Improved Cholesky Decomposition Based MIMO Detector on FPGAs., , and . AHS, page 369-375. IEEE Computer Society, (2009)An FPGA task allocator with preliminary First-Fit 2D packing algorithms., , , , and . AHS, page 264-270. IEEE, (2011)