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S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction scheme.

M. Ding, P. Harpe, Y. Liu, B. Busze, K. Philips, and H. de Groot. ISSCC, page 1-3. IEEE, (2015)

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26.2 A 5.5fJ/conv-step 6.4MS/S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction scheme.M. Ding, P. Harpe, Y. Liu, B. Busze, K. Philips, and H. de Groot. ISSCC, page 1-3. IEEE, (2015)5.3 A 95µW 24MHz digitally controlled crystal oscillator for IoT applications with 36nJ start-up energy and >13× start-up time reduction using a fully-autonomous dynamically-adjusted load.M. Ding, Y. Liu, Y. Zhang, C. Lu, P. Zhang, B. Busze, C. Bachmann, and K. Philips. ISSCC, page 90-91. IEEE, (2017)A 46 µW 13 b 6.4 MS/s SAR ADC With Background Mismatch and Offset Calibration.M. Ding, P. Harpe, Y. Liu, B. Busze, K. Philips, and H. de Groot. IEEE J. Solid State Circuits, 52 (2): 423-432 (2017)A 1.3 nJ/b IEEE 802.11ah Fully-Digital Polar Transmitter for IoT Applications.A. Ba, Y. Liu, J. van den Heuvel, P. Mateman, B. Busze, J. Dijkhuis, C. Bachmann, G. Dolmans, K. Philips, and H. de Groot. IEEE J. Solid State Circuits, 51 (12): 3103-3113 (2016)26.3 A 1.3nJ/b IEEE 802.11ah fully digital polar transmitter for IoE applications.A. Ba, Y. Liu, J. van den Heuvel, P. Mateman, B. Busze, J. Gloudemans, P. Vis, J. Dijkhuis, C. Bachmann, G. Dolmans and 2 other author(s). ISSCC, page 440-441. IEEE, (2016)A 0.9-1.2V supplied, 2.4GHz Bluetooth Low Energy 4.0/4.2 and 802.15.4 transceiver SoC optimized for battery life.X. Wang, J. van den Heuvel, G. van Schaik, C. Lu, Y. He, A. Ba, B. Busze, M. Ding, Y. Liu, N. Winkel and 3 other author(s). ESSCIRC, page 125-128. IEEE, (2016)Real time non-coherent synchronization method in 6-10.6 GHz IR-UWB demonstrator chipset.J. van den Heuvel, H. Pflug, A. Ramkumar, A. Young, J. Romme, M. Hijdra, B. Busze, A. Breeschoten, G. Janssen, G. Dolmans and 2 other author(s). GLOBECOM, page 3728-3734. IEEE, (2013)An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS.Y. Liu, J. van den Heuvel, T. Kuramochi, B. Busze, P. Mateman, V. Chillara, B. Wang, R. Staszewski, and K. Philips. IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (5): 1094-1105 (2017)24.7 A 673µW 1.8-to-2.5GHz dividerless fractional-N digital PLL with an inherent frequency-capture capability and a phase-dithering spur mitigation for IoT applications.Y. He, Y. Liu, T. Kuramochi, J. van den Heuvel, B. Busze, N. Markulic, C. Bachmann, and K. Philips. ISSCC, page 420-421. IEEE, (2017)A circuit-design-driven tool with a hybrid automation approach for SAR ADCs in IoT.M. Ding, G. Chen, P. Harpe, B. Busze, Y. Liu, C. Bachmann, K. Philips, and A. van Roermund. DATE, page 672-675. IEEE, (2018)

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26.2 A 5.5fJ/conv-step 6.4MS/S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction scheme.

Please choose a person to relate this publication to

Heinz Buszello

Katrin Buszello

Claus Peter Buszello

Heinz Buszello

Horst Buszello

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Busze, Benjamin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 26.2 A 5.5fJ/conv-step 6.4MS/S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction scheme.

Please choose a person to relate this publication to

Heinz Buszello

Katrin Buszello

Claus Peter Buszello

Heinz Buszello

Horst Buszello

Other publications of authors with the same name

Disambiguation

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community post
history of this post
URL
DOI
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Chicago
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26.2 A 5.5fJ/conv-step 6.4MS/S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction scheme.