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Disambiguation of "Sakurai, Takayasu"

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Electrical artificial skin using ultraflexible organic transistor.

, , , , and . DAC, page 125:1-125:3. ACM, (2013)

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Yoriko Sakurai

Kaneaki Sakurai

Takayasu Shimizu

Miriam Takayasu

 

Other publications of authors with the same name

Reducing IR drop in 3D integration to less than 1/4 using Buck Converter on Top die (BCT) scheme., , , , , , , and . ISQED, page 210-215. IEEE, (2013)High-Speed Circuit Design with Scaled-Down MOSFET's and Low Supply Voltage.. ISCAS, page 1487-1490. IEEE, (1993)Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories., , , , , , and . ISLPED, page 87-92. ACM, (2009)A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS., , , , , , , and . ASP-DAC, page 109-110. IEEE, (2013)An on-chip characterizing system for within-die delay variation measurement of individual standard cells in 65-nm CMOS., , , and . ASP-DAC, page 109-110. IEEE, (2011)0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2010)Digital Active Gate Drive with Optimal Switching Patterns to Adapt to Sinusoidal Output Current in a Full Bridge Inverter Circuit., , , , , , , and . IECON, page 1684-1689. IEEE, (2019)A High-Speed Inductive-Coupling Link With Burst Transmission., , , , , and . IEEE J. Solid State Circuits, 44 (3): 947-955 (2009)An 11-nW CMOS Temperature-to-Digital Converter Utilizing Sub-Threshold Current at Sub-Thermal Drain Voltage., , , and . IEEE J. Solid State Circuits, 54 (3): 613-622 (2019)Power distribution analysis of VLSI interconnects using model orderreduction., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (6): 739-745 (2002)