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An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs.

, , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (7): 1873-1883 (2008)

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An Unconstrained Architecture for High-Order Sigma Delta Force-Feedback Inertial Sensors., , and . ISCAS, page 3063-3066. IEEE, (2007)An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (7): 1873-1883 (2008)Passive Loop Filter Assistance for CTSDMs., , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (10): 1157-1161 (2017)A Current-Mode Floating-Bridge Technique for Closed-Loop ΣΔ Readout of Wheatstone Bridge Sensors., and . ISCAS, page 1-5. IEEE, (2019)Time domain adaptive delay estimation., and . IEEE Trans. Signal Process., 48 (9): 2701-2705 (2000)Low-Pass Filtering SC-DAC for Reduced Jitter and Slewing Requirements on CTSDMs., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (4): 1369-1381 (2019)On noise suppression in adaptive delay estimation., and . ISSPA, page 211-214. IEEE, (1999)An efficient technique to eliminate quantisation noise folding in double-sampling Sigma-Delta modulators., , and . ISCAS (3), page 707-710. IEEE, (2002)First-order Hold DAC Reconstruction Filtering for Efficient Image Rejection., , , and . ICECS 2022, page 1-4. IEEE, (2022)An approach to tackle quantization noise folding in double-sampling ΣΔ modulation A/D converters., , and . IEEE Trans. Circuits Syst. II Express Briefs, 50 (4): 157-163 (2003)