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Low-energy signal processing using circuit-level timing-error acceptance.

, , and . ICICDT, page 1-4. IEEE, (2012)

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Low-energy digital filter design based on controlled timing error acceptance., , and . ISQED, page 151-157. IEEE, (2013)Temperature-aware NBTI modeling and the impact of input vector control on performance degradation., , , , , and . DATE, page 546-551. EDA Consortium, San Jose, CA, USA, (2007)Modeling of PMOS NBTI Effect Considering Temperature Variation., , , , , and . ISQED, page 139-144. IEEE Computer Society, (2007)A power gating scheme for ground bounce reduction during mode transition., , and . ICCD, page 388-394. IEEE, (2007)Controlled timing-error acceptance for low energy IDCT design., , and . DATE, page 758-763. IEEE, (2011)A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect., , , , , and . PATMOS, volume 4644 of Lecture Notes in Computer Science, page 160-170. Springer, (2007)Low-energy signal processing using circuit-level timing-error acceptance., , and . ICICDT, page 1-4. IEEE, (2012)Modeling and synthesis of quality-energy optimal approximate adders., , , and . ICCAD, page 728-735. ACM, (2012)Decomposition Construction for Secret Sharing Schemes with Graph Access Structures in Polynomial Time., , , and . SIAM J. Discret. Math., 24 (2): 617-638 (2010)Channel holding time of packet sessions in all-IP cellular networks., , , and . ICPADS, page 404-411. IEEE Computer Society, (2014)