Author of the publication

Characterization of Direct Cache Access on multi-core systems and 10GbE.

, , and . HPCA, page 341-352. IEEE Computer Society, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Fabsim-X: A Simulation Framework for the Analysis of Large-Scale Topologies and Congestion Control Protocols in Data Center Networks., , , , , , , , , and 4 other author(s). MASCOTS, page 1-8. IEEE, (2020)Impact of Cache Coherence Protocols on the Processing of Network Traffic., and . MICRO, page 161-171. IEEE Computer Society, (2007)Architectural Breakdown of End-to-End Latency in a TCP/IP Network., , and . SBAC-PAD, page 195-202. IEEE Computer Society, (2007)Characterization of Direct Cache Access on multi-core systems and 10GbE., , and . HPCA, page 341-352. IEEE Computer Society, (2009)ASPEN: Towards Effective Simulation of Threads and Engines in Evolving Platforms., , , , and . MASCOTS, page 51-58. IEEE Computer Society, (2004)Understanding Power Efficiency of TCP/IP Packet Processing over 10GbE., , , , and . Hot Interconnects, page 32-39. IEEE Computer Society, (2010)A neural network architecture for faster dynamic scheduling in manufacturing systems., and . ICRA, page 2408-2413. IEEE Computer Society, (1991)Architectural Breakdown of End-to-End Latency in a TCP/IP Network., , , and . Int. J. Parallel Program., 37 (6): 556-571 (2009)Achieving 10Gbps Network Processing: Are We There Yet?., , , , , and . HiPC, volume 5374 of Lecture Notes in Computer Science, page 518-528. Springer, (2008)An architecture level simulation methodology., and . Annual Simulation Symposium, page 240-253. IEEE Computer Society, (1991)