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Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating.

K. Lingasubramanian, A. Calimera, A. Macii, E. Macii, and M. Poncino. PATMOS, volume 6951 of Lecture Notes in Computer Science, page 214-225. Springer, (2011)

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Enrico Fest

Enrico Meier

Enrico Körner

Enrico Schramm

Enrico Streit

Other publications of authors with the same name

Power optimization of technology-dependent circuits based on symbolic computation of logic implications.R. Bahar, E. Lampe, and E. Macii. ACM Trans. Design Autom. Electr. Syst., 5 (3): 267-293 (2000)Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers.L. Benini, G. Micheli, E. Macii, M. Poncino, and R. Scarsi. ACM Trans. Design Autom. Electr. Syst., 4 (4): 351-375 (1999)Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits.A. Calimera, R. Bahar, E. Macii, and M. Poncino. ISLPED, page 217-220. ACM, (2008)Limited intra-word transition codes: an energy-efficient bus encoding for LCD display interfaces.S. Salerno, A. Bocca, E. Macii, and M. Poncino. ISLPED, page 206-211. ACM, (2004)Energy-efficient data scrambling on memory-processor interfaces.L. Benini, A. Galati, A. Macii, E. Macii, and M. Poncino. ISLPED, page 26-29. ACM, (2003)An open-source framework for formal specification and simulation of electrical energy systems.S. Vinco, A. Sassone, F. Fummi, E. Macii, and M. Poncino. ISLPED, page 287-290. ACM, (2014)Power-aware clock tree planning.M. Donno, E. Macii, and L. Mazzoni. ISPD, page 138-147. ACM, (2004)A novel architecture for power maskable arithmetic units.L. Benini, A. Macii, E. Macii, E. Omerbegovic, M. Poncino, and F. Pro. ACM Great Lakes Symposium on VLSI, page 136-140. ACM, (2003)Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions.R. Rizzo, S. Miryala, A. Calimera, E. Macii, and M. Poncino. ACM Great Lakes Symposium on VLSI, page 253-258. ACM, (2015)District Information Modeling and Energy Management.E. Patti, A. Ronzino, A. Osello, V. Verda, A. Acquaviva, and E. Macii. IT Prof., 17 (6): 28-34 (2015)

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Disambiguation of "Macii, Enrico"

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Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating.

Please choose a person to relate this publication to

Enrico Fest

Enrico Meier

Enrico Körner

Enrico Schramm

Enrico Streit

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Macii, Enrico"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating.

Please choose a person to relate this publication to

Enrico Fest

Enrico Meier

Enrico Körner

Enrico Schramm

Enrico Streit

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating.