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Disambiguation of "Boyer, François-Raymond"

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Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis.

, , and . ISCAS, page 1-5. IEEE, (2018)

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François Elvinger

François Weirich

François Melis

François Guers

François Franceschi

 

Other publications of authors with the same name

Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis., , and . ISCAS, page 1-5. IEEE, (2018)A high-speed traffic manager architecture for flow-based networking., , and . NEWCAS, page 161-164. IEEE, (2017)Extern Objects in P4: an ROHC Header Compression Scheme Case Study., , , and . NetSoft, page 517-522. IEEE, (2018)An efficient verification method for a class of multi-phase sequential circuits., , and . ICECS, page 510-515. IEEE, (2000)A Fast, Single-Instruction-Multiple-Data, Scalable Priority Queue., , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (10): 1939-1952 (2018)HPQ: A High Capacity Hybrid Priority Queue Architecture for High-Speed Network Switches., , and . NEWCAS, page 229-233. IEEE, (2018)A fast systolic priority queue architecture for a flow-based Traffic Manager., , , and . NEWCAS, page 1-4. IEEE, (2016)Design of low power 4-bit flash ADC based on standard cells., , and . NEWCAS, page 1-4. IEEE, (2013)P4-Compatible High-Level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs., , and . FPGA, page 147-152. ACM, (2018)Extern Objects in P4: an ROHC Compression Case Study., , , and . CoRR, (2016)