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Disambiguation of "Turner, Walker J."

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AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies.

, , , , , , , , , and . ISPD, page 175-183. ACM, (2022)

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H J M Turner

Ernst Turner

John Turner

Anke Turner

Ernst Turner

 

Other publications of authors with the same name

6.6 Reference-Noise Compensation Scheme for Single-Ended Package-to-Package Links., , , , , , , , , and 1 other author(s). ISSCC, page 126-128. IEEE, (2020)A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS., , , , , , , , , and 1 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)TAG: Learning Circuit Spatial Embedding from Layouts., , , , , , and . ICCAD, page 66:1-66:9. ACM, (2022)Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization., , , , , and . DATE, page 1372-1377. IEEE, (2021)Leveraging Micro-Bump Pitch Scaling to Accelerate Interposer Link Bandwidths for Future High-Performance Compute Applications., , , , , , , , and . CICC, page 1-7. IEEE, (2024)A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS., , , , , , , , , and 1 other author(s). VLSI Technology and Circuits, page 154-155. IEEE, (2022)A 2-to-20 GHz Multi-Phase Clock Generator with Phase Interpolators Using Injection-Locked Oscillation Buffers for High-Speed IOs in 16nm FinFET., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2019)Reinforcement Learning Guided Detailed Routing for Custom Circuits., , , , , , and . ISPD, page 26-34. ACM, (2023)A 4.7T/11.1T NMR compliant wirelessly programmable implant for bio-artificial pancreas in vivo monitoring., and . VLSIC, page 1-2. IEEE, (2014)A 77 MHz Relaxation Oscillator in 5nm FinFET with 3ns TIE over 10K cycles and ±0.3% Thermal Stability using Frequency-Error Feedback Loop., , , , , and . A-SSCC, page 1-3. IEEE, (2021)