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Thermal correlation between measurements and FEM simulations in 3D ICs.

P. Souare, F. de Crecy, V. Fiori, M. Jamaa, A. Farcy, S. Gallois-Garreignot, A. Borbely, J. Colonna, P. Coudrain, B. Giraud, C. Laviron, S. Cheramy, C. Tavernier, и J. Michailos. 3DIC, стр. 1-6. IEEE, (2013)

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Thermal correlation between measurements and FEM simulations in 3D ICs.P. Souare, F. de Crecy, V. Fiori, M. Jamaa, A. Farcy, S. Gallois-Garreignot, A. Borbely, J. Colonna, P. Coudrain, B. Giraud и 4 other автор(ы). 3DIC, стр. 1-6. IEEE, (2013)Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes.C. Santos, P. Vivet, S. Thuries, O. Billoint, J. Colonna, P. Coudrain, и L. Wang. 3DIC, стр. 1-5. IEEE, (2016)Heat spreading packaging solutions for hybrid bonded 3D-ICs.R. Prieto, P. Coudrain, J. Colonna, Y. Hallez, C. Chancel, V. Rat, S. Dumas, G. Romano, R. Franiatte, C. Brunet-Manquiat и 2 other автор(ы). 3DIC, стр. 1-6. IEEE, (2016)Chip to wafer copper direct bonding electrical characterization and thermal cycling.Y. Beilliard, P. Coudrain, L. Cioccio, S. Moreau, L. Sanchez, B. Montmayeul, T. Signamarcheix, R. Estevez, и G. Parry. 3DIC, стр. 1-7. IEEE, (2013)Graphite-based heat spreaders for hotspot mitigation in 3D ICs.C. Santos, R. Prieto, P. Vivet, J. Colonna, P. Coudrain, и R. Reis. 3DIC, стр. TS10.4.1-TS10.4.4. IEEE, (2015)Advances toward reliable high density Cu-Cu interconnects by Cu-SiO2 direct hybrid bonding.Y. Beilliard, S. Moreau, L. Cioccio, P. Coudrain, G. Romano, A. Nowodzinski, F. Aussenac, P. Jouneau, E. Rolland, и T. Signamarcheix. 3DIC, стр. 1-8. IEEE, (2014)Using TSVs for thermal mitigation in 3D circuits: Wish and truth.C. Santos, P. Souare, F. de Crecy, P. Coudrain, J. Colonna, P. Vivet, A. Borbely, R. Reis, M. Jamaa, V. Fiori и 1 other автор(ы). 3DIC, стр. 1-8. IEEE, (2014)3D integration demonstration of a wireless product with design partitioning.G. Druais, P. Ancey, C. Aumont, V. Caubet, L. Chapelon, C. Chaton, S. Cheramy, S. Cordova, E. Cirot, J. Colonna и 17 other автор(ы). 3DIC, стр. 1-5. IEEE, (2011)3-D Sequential Integration: A Key Enabling Technology for Heterogeneous Co-Integration of New Function With CMOS.P. Batude, T. Ernst, J. Arcamone, G. Arndt, P. Coudrain, и P. Gaillardon. IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (4): 714-722 (2012)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters.P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, G. Moritz, I. Miro-Panades, C. Tortolero, J. Durupt, C. Bernard, D. Varreau и 18 other автор(ы). ISSCC, стр. 46-48. IEEE, (2020)

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