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Bubble Razor: An architecture-independent approach to timing-error detection and correction.

, , , , , , and . ISSCC, page 488-490. IEEE, (2012)

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Implementation of a 64-bit Jackson adder., , , , and . ACSSC, page 1149-1154. IEEE, (2013)Parallel high-radix Montgomery multipliers., , and . ACSCC, page 772-776. IEEE, (2008)Implementation of 32-bit Ling and Jackson adders., , , , , and . ACSCC, page 170-175. IEEE, (2011)Energy-delay tradeoffs in 32-bit static shifter designs., , , , , and . ICCD, page 626-632. IEEE Computer Society, (2008)A Counterflow Pipeline Experiment., , , , , , , and . ASYNC, page 161-172. IEEE Computer Society, (1999)Comparison of noise tolerant precharge (NTP) to conventional feedback keepers for dynamic logic., , , and . ACM Great Lakes Symposium on VLSI, page 261-264. ACM, (2003)Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction., , , , , , and . IEEE J. Solid State Circuits, 48 (1): 66-81 (2013)Bubble Razor: An architecture-independent approach to timing-error detection and correction., , , , , , and . ISSCC, page 488-490. IEEE, (2012)Comparison of parallelized radix-2 and radix-4 scalable Montgomery multipliers., , , , , , , , , and . ACSSC, page 1144-1148. IEEE, (2013)Introductory digital design & computer architecture curriculum., and . MSE, page 14-16. IEEE Computer Society, (2013)