From post

копировать удалить добавить публикацию в буфер
Запись сообщества
посмотреть историю данной записи
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation.

Z. Deniz, Y. Leblebici, и E. Vittoz. IEEE J. Solid State Circuits, 42 (7): 1593-1606 (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Ufuk Toprak

Hanefi Toprak

Cengiz Deniz

Vedat Deniz

Abdülkerim Deniz

Другие публикации лиц с тем же именем

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation.Z. Deniz, Y. Leblebici, и E. Vittoz. IEEE J. Solid State Circuits, 42 (7): 1593-1606 (2007)Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications.A. Rylyakov, J. Tierno, H. Ainspan, J. Plouchart, J. Bulzacchelli, Z. Deniz, и D. Friedman. ISSCC, стр. 94-95. IEEE, (2009)Root cause identification of an hard-to-find on-chip power supply coupling fail.F. Stellari, T. Cowell, P. Song, M. Sorna, Z. Deniz, J. Bulzacchelli, и N. Mitra. ITC, стр. 1-7. IEEE Computer Society, (2012)Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration.T. Dickson, Z. Deniz, M. Cochet, J. Bulzacchelli, M. Kossel, P. Francese, T. Morf, J. Proesel, H. Ainspan, M. Brändli и 1 other автор(ы). CICC, стр. 1-8. IEEE, (2024)The POWER8TM processor: Designed for big data, analytics, and cloud environments.J. Friedrich, H. Le, W. Starke, J. Stuecheli, B. Sinharoy, E. Fluhr, D. Dreps, V. Zyuban, G. Still, C. Gonzalez и 10 other автор(ы). ICICDT, стр. 1-4. IEEE, (2014)A 0.88pJ/bit 112Gb/s PAM4 Transmitter with $1V_ppd$ Output Swing and 5-Tap Analog FFE in 7nm FinFET CMOS.Z. Deniz, T. Dickson, M. Cochet, J. Proesel, J. Bulzacchelli, H. Ainspan, M. Brändli, T. Morf, M. Beakes, и M. Meghelli. VLSI Technology and Circuits, стр. 1-2. IEEE, (2024)A 1.8-pJ/bit 16×16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration.T. Dickson, Y. Liu, A. Agrawal, J. Bulzacchelli, H. Ainspan, Z. Deniz, B. Parker, M. Meghelli, и D. Friedman. CICC, стр. 1-4. IEEE, (2015)Low-power current mode logic for improved DPA-resistance in embedded systems.Z. Deniz, и Y. Leblebici. ISCAS (2), стр. 1059-1062. IEEE, (2005)Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation.Z. Deniz, Y. Leblebici, и E. Vittoz. VLSI-SoC (Selected Papers), том 249 из IFIP, стр. 217-240. Springer, (2006)Distributed Network of LDO Microregulators Providing Submicrosecond DVFS and IR Drop Compensation for a 24-Core Microprocessor in 14nm SOI CMOS.M. Perez, M. Sperling, T. Diemoz, J. Bulzacchelli, и Z. Deniz. CICC, стр. 1-4. IEEE, (2019)

BibSonomy

Disambiguation