( en | de | ru )

 

Disambiguation of "Vemuri, Ranga"

Author of the publication

copydeleteadd this publication to your clipboard
A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesis.

, , and . ISCAS (6), page 362-365. IEEE, (1999)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Janki Rangatia

Sripriya Rangarajan

Kiril Rangatscheff

Hiranmayi Ranganathan

Palani Murugan Rangasamy

 

Other publications of authors with the same name

Finite state machine verification on MIMD machines., and . EURO-DAC, page 514-520. IEEE Computer Society Press, (1992)Battery-efficient task execution on portable reconfigurable computing., , and . SoCC, page 237-240. IEEE, (2004)A Decomposition-based Symbolic Analysis Method for Analog Synthesis from Behavioral Specifications., and . VLSI, volume 162 of IFIP Conference Proceedings, page 305-317. Kluwer, (1999)Adaptive Sampling and Modeling of Analog Circuit Performance Parameters., , and . VLSI-SOC, page 142-. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)MSL: A High-Level Language for Parameterized Analog and Mixed Signal Layout Generators., and . VLSI-SOC, page 416-421. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Throughput Optimization with Design Space Exploration During Partitioning for Multi-FPGA Architectures., and . FPGA, page 253. ACM, (1999)Topology synthesis of analog circuits based on adaptively generated building blocks., and . DAC, page 44-49. ACM, (2008)An efficient algorithm for finding empty space for online FPGA placement., and . DAC, page 960-965. ACM, (2004)Hybrid Shielding: Amplifying the Power of Camouflaging and Logic Encryption., and . MWSCAS, page 1103-1107. IEEE, (2023)RELUT-GNN: Reverse Engineering Data Path Elements From LUT Netlists Using Graph Neural Networks., , , , , and . MWSCAS, page 511-515. IEEE, (2023)