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Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment.

W. Kang, D. Kwon, S. Woo, S. Lee, H. Yoo, J. Kim, B. Park, and J. Lee. IEEE Access, (2021)

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Sung-Woo Son

Sung-Woo Im

Sung-myong Woo

Woo-Seob Yun

Sung-Woo Hong

Other publications of authors with the same name

Pulse-Width Modulation Neuron Implemented by Single Positive-Feedback Device.S. Woo, D. Kwon, B. Park, J. Lee, and J. Bae. CoRR, (2021)Review of candidate devices for neuromorphic applications.J. Lee, Y. Noh, H. Kim, J. Kim, J. Bae, S. Woo, S. Lee, S. Lim, W. Kang, Y. Seo and 3 other author(s). ESSDERC, page 22-27. IEEE, (2019)A Spiking Neural Network with a Global Self-Controller for Unsupervised Learning Based on Spike-Timing-Dependent Plasticity Using Flash Memory Synaptic Devices.W. Kang, C. Kim, S. Lee, S. Woo, J. Bae, B. Park, and J. Lee. IJCNN, page 1-7. IEEE, (2019)Si-Based Dual-Gate Field-Effect Transistor Array for Low-Power On-Chip Trainable Hardware Neural Networks.K. Lee, D. Kwon, I. Lee, J. Hwang, J. Im, J. Bae, W. Choi, S. Woo, and J. Lee. Adv. Intell. Syst., (January 2024)Neuron Circuits for Low-Power Spiking Neural Networks Using Time-To-First-Spike Encoding.S. Oh, D. Kwon, G. Yeom, W. Kang, S. Lee, S. Woo, J. Kim, and J. Lee. IEEE Access, (2022)Hardware-based spiking neural network architecture using simplified backpropagation algorithm and homeostasis functionality.J. Kim, D. Kwon, S. Woo, W. Kang, S. Lee, S. Oh, C. Kim, J. Bae, B. Park, and J. Lee. Neurocomputing, (2021)InGaAs/Si Heterojunction Tunneling Field-Effect Transistor on Silicon Substrate.S. Woo, Y. Yoon, J. Seo, G. Yoo, S. Cho, and I. Kang. IEICE Trans. Electron., 97-C (7): 677-682 (2014)Low-Power Binary Neuron Circuit With Adjustable Threshold for Binary Neural Networks Using NAND Flash Memory.S. Lee, S. Woo, and J. Lee. IEEE Access, (2020)Low-Power and High-Density Neuron Device for Simultaneous Processing of Excitatory and Inhibitory Signals in Neuromorphic Systems.S. Woo, D. Kwon, N. Choi, W. Kang, Y. Seo, M. Park, J. Bae, B. Park, and J. Lee. IEEE Access, (2020)Spiking Neural Networks With Time-to-First-Spike Coding Using TFT-Type Synaptic Device Model.S. Oh, S. Lee, S. Woo, D. Kwon, J. Im, J. Hwang, J. Bae, B. Park, and J. Lee. IEEE Access, (2021)

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Disambiguation of "Woo, Sung Yun"

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Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment.

Please choose a person to relate this publication to

Sung-Woo Son

Sung-Woo Im

Sung-myong Woo

Woo-Seob Yun

Sung-Woo Hong

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Woo, Sung Yun"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment.

Please choose a person to relate this publication to

Sung-Woo Son

Sung-Woo Im

Sung-myong Woo

Woo-Seob Yun

Sung-Woo Hong

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment.