( en | de | ru )

 

Disambiguation of "Duran, Ckristian"

Author of the publication

copydeleteadd this publication to your clipboard
An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications.

, , , , , , , , , , , , , , , , , , , , and . CICC, page 1-4. IEEE, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Mansur Duran

Duran Yalcinkaya

Ayse Duran

Ibrahim Duran

Daniel Duran

 

Other publications of authors with the same name

A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse., , , , , , , and . IEEE Access, (2021)Routing-Aware Standard Cell Placement Algorithm Applying Boolean Satisfiability., and . ISCAS, page 1-5. IEEE, (2021)A Unified NVRAM and TRNG in Standard CMOS Technology., , , and . IEEE Access, (2022)A Unified OTP and PUF Exploiting Post-Program Current on Standard CMOS Technology., , , , , , and . ISCAS, page 1-5. IEEE, (2024)A Low-Area Direct Memory Access Controller Architecture for a RISC-V Based Low-Power Microcontroller., , and . LASCAS, page 97-100. IEEE, (2019)Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based Processors., , , , , and . ISCAS, page 1-4. IEEE, (2020)Cryptographic Accelerators for Trusted Execution Environment in RISC-V Processors., , , , and . ISCAS, page 1-4. IEEE, (2020)A 3.65 Gb/s Area-Efficiency ChaCha20 Cryptocore., , , , and . ISOCC, page 79-80. IEEE, (2022)ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3., , , , , , and . ISOCC, page 17-18. IEEE, (2021)A 32-bit RISC-V AXI4-lite bus-based microcontroller with 10-bit SAR ADC., , , , , , , , , and 5 other author(s). LASCAS, page 315-318. IEEE, (2016)