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System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture., , , , , , , and . HCS, page 1-16. IEEE, (2021)A Low-Power Low-Area SoC based in RISC-V Processor for IoT Applications., , , , , , and . ISOCC, page 375-376. IEEE, (2021)In-NVRAM Unified PUF and TRNG Based on Standard CMOS Technology., , , , , and . ISCAS, page 1-5. IEEE, (2023)A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse., , , , , , , and . IEEE Access, (2021)A 3.65 Gb/s Area-Efficiency ChaCha20 Cryptocore., , , , and . ISOCC, page 79-80. IEEE, (2022)ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3., , , , , , and . ISOCC, page 17-18. IEEE, (2021)A Unified NVRAM and TRNG in Standard CMOS Technology., , , and . IEEE Access, (2022)A Flexible Debugger for a RISC-V Based 32-bit System-on-Chip., , and . LASCAS, page 1-4. IEEE, (2020)A Unified OTP and PUF Exploiting Post-Program Current on Standard CMOS Technology., , , , , , and . ISCAS, page 1-5. IEEE, (2024)