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Phase change memory architecture and the quest for scalability., , , and . Commun. ACM, 53 (7): 99-106 (2010)Memory power management via dynamic voltage/frequency scaling., , , , and . ICAC, page 31-40. ACM, (2011)A Workload and Programming Ease Driven Perspective of Processing-in-Memory., , , , and . CoRR, (2019)Refresh Triggered Computation: Improving the Energy Efficiency of Convolutional Neural Network Accelerators., , , and . CoRR, (2019)Automatic Generation of Warp-Level Primitives and Atomic Instructions for Fast and Portable Parallel Reduction on GPUs., , , , , and . CGO, page 73-84. IEEE, (2019)NoM: Network-on-Memory for Inter-Bank Data Transfer in Highly-Banked Memories., , , , , and . IEEE Comput. Archit. Lett., 19 (1): 80-83 (2020)Extending Memory Capacity in Modern Consumer Systems With Emerging Non-Volatile Memory: Experimental Analysis and Characterization Using the Intel Optane SSD., , , , , , , , , and 1 other author(s). IEEE Access, (2023)RFVP: Rollback-Free Value Prediction with Safe-to-Approximate Loads., , , , , and . ACM Trans. Archit. Code Optim., 12 (4): 62:1-62:26 (2016)ITAP: Idle-Time-Aware Power Management for GPU Execution Units., , , , , , , , , and . ACM Trans. Archit. Code Optim., 16 (1): 3:1-3:26 (2019)Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication., , , and . IEEE Micro, 27 (1): 94-104 (2007)