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Disambiguation of "Seabaugh, Alan C."

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A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays.

, , , , , and . DAC, page 1-6. IEEE, (2020)

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Safwat Alani

Maia Alandjiyska

Yilmaz Alan

Viola Alanku

Bertold Aland

 

Other publications of authors with the same name

Device and Architecture Outlook for Beyond CMOS Switches., , , , and . Proc. IEEE, 98 (12): 2169-2184 (2010)In Quest of the Next Information Processing Substrate: Extended Abstract: Invited., , , , , , , , , and 2 other author(s). DAC, page 17:1-17:6. ACM, (2017)Steep Subthreshold Swing Originating from Gate Delay., , , , and . DRC, page 53-54. IEEE, (2019)Resonant Tunneling Technology for Mixed Signal and Digital Circuits in the 10-100 GHz Domain., , , , and . Great Lakes Symposium on VLSI, page 123-. IEEE Computer Society, (1999)Dynamics of Ferroelectric and Ionic Memories: Physics and Applications., , , , and . ASICON, page 1-4. IEEE, (2019)Process Dependent Switching Dynamics of Ferroelectric Hafnium Zirconate., , and . DRC, page 49-50. IEEE, (2019)Electric Double Layer Esaki Tunnel Junction in a 40-nm-Length, WSe2 Channel Grown by Molecular Beam Epitaxy on Al203., , , and . ESSDERC, page 110-113. IEEE, (2018)Supercapacity (>1000 fJF/cm2) charge release in a CVD-grown WSe2 FET incorporating a PEO: CsCI04 side gate., , , , , , and . DRC, page 1-2. IEEE, (2018)A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays., , , , , and . DAC, page 1-6. IEEE, (2020)Multiple-Valued Logic Computation Circuits Using Micro- and Nanoelectronic Devices., , and . ISMVL, page 164-169. IEEE Computer Society, (1993)