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Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU.

, , , и . JETC, 11 (3): 30:1-30:22 (2014)

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Nikhilranjan Sen

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A Realistic Configurable Level Triggered Flip-Flop in Quantum-Dot Cellular Automata., , и . VDAT, том 1066 из Communications in Computer and Information Science, стр. 455-467. Springer, (2019)Regular clocking-based Automated Cell Placement technique in QCA targeting sequential circuit., , , , , , и . Comput. Electr. Eng., (2022)Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers., , , и . Comput. Electr. Eng., (2015)Design of fault tolerant majority voter for TMR circuit in QCA., , , и . VDAT, стр. 1-2. IEEE, (2016)Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect., , , , и . VLSID, стр. 575-576. IEEE Computer Society, (2016)Synthesis of Reversible Universal Logic around QCA with Online Testability., , , и . ISED, стр. 236-241. IEEE Computer Society, (2011)Introducing universal QCA logic gate for synthesizing symmetric functions with minimum wire-crossings., , и . ICWET, стр. 828-833. ACM, (2010)Design and Analysis of Regular Clock Based 2: 4 Decoder Using T-Gate in QCA., , , и . ASCAT, том 1443 из Advances in Intelligent Systems and Computing, стр. 81-91. Springer, (2023)Design of fault tolerant majority voter for error resilient TMR targeting micro to nano scale logic., , , и . Int. J. Comput. Sci. Eng., 21 (3): 375-393 (2020)Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic., , , и . Microelectron. J., (2017)