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Analysis of super cut-off transistors for ultralow power digital logic circuits., , , и . ISLPED, стр. 2-7. ACM, (2006)Device/circuit/architecture co-design of reliable STT-MRAM., , и . DATE, стр. 1437-1442. ACM, (2015)Electrical Tunable Spintronic Neuron with Trainable Activation Function., , , , , и . CoRR, (2022)Connection Pruning for Deep Spiking Neural Networks with On-Chip Learning., , и . ICONS, стр. 11:1-11:8. ACM, (2021)A low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks., , , , , и . ISCAS, стр. 914-917. IEEE, (2016)Energy-Efficient Ising Machines Using Capacitance-Coupled Latches for MaxCut Solving., и . ISCAS, стр. 1-5. IEEE, (2024)Spin-Transfer Torque Devices for Logic and Memory: Prospects and Perspectives., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (1): 1-22 (2016)Domain-specific computing with non-volatile multi-terminal devices.. ICICDT, стр. xxxiv. IEEE, (2023)A Semi-Supervised Learning Method for Spiking Neural Networks Based on Pseudo-Labeling., , и . IJCNN, стр. 1-7. IEEE, (2023)SIMBA: A Skyrmionic In-Memory Binary Neural Network Accelerator., , и . CoRR, (2020)