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5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS., , , , , , , , , и 12 other автор(ы). IEEE J. Solid State Circuits, 37 (11): 1421-1432 (2002)8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator., , , , , и . ISSCC, стр. 142-143. IEEE, (2017)Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities., , , , , и . ISLPED, стр. 1-2. IEEE, (2017)Security keynote: Ultra-low-energy security circuit primitives for IoT platforms.. ITC, стр. 1. IEEE, (2017)18Gbps, 50mW reconfigurable multi-mode SHA Hashing accelerator in 45nm CMOS., , , , , , , , , и . ESSCIRC, стр. 210-213. IEEE, (2010)A 100Gbps Fault-Injection Attack Resistant AES-256 Engine with 99.1-to-99.99% Error Coverage in Intel 4 CMOS., , , , , и . ISSCC, стр. 244-245. IEEE, (2023)A 350mV-900mV 2.1GHz 0.011mm2 regular expression matching accelerator with aging-tolerant low-VMIN circuits in 14nm tri-gate CMOS., , , , , , , и . VLSI Circuits, стр. 1-2. IEEE, (2016)Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI Processors in 10nm CMOS., , , , , , , , , и 6 other автор(ы). VLSI Circuits, стр. 1-2. IEEE, (2020)A 2.8GHz 128-entry × 152b 3-read/2-write multi-precision floating-point register file and shuffler in 32nm CMOS., , , , , , , и . VLSIC, стр. 118-119. IEEE, (2012)A 260mV 468GOPS/W 256b 4-way to 32-way vector shifter with permute-assisted skip in 22nm tri-gate CMOS., , , , , , и . ESSCIRC, стр. 177-180. IEEE, (2012)