( en | de | ru )

 

Disambiguation of "Shi, Longxing"

Author of the publication

copydeleteadd this publication to your clipboard
Learning-driven Physically-aware Large-scale Circuit Gate Sizing.

, , , , , , and . CoRR, (2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Huili Shi

Lei Shi

Zhanjun Shi

Jian Shi

Renhu Shi

 

Other publications of authors with the same name

A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 56 (1): 151-164 (2021)A Bi-Directional, Zero-Latency Adaptive Clocking Circuit in a 28-nm Wide AVFS System., , , , , , and . IEEE J. Solid State Circuits, 55 (3): 826-836 (2020)VASTA: A Wide Voltage Statistical Timing Analysis Tool Based on Variation-Aware Cell Delay Models., , , , and . IEEE Access, (2020)Optimized matrix ordering of sparse linear solver using a few-shot model for circuit simulation., , , , and . Integr., (November 2023)A Novel Fast-Lock-in Digitally Controlled Phase-Locked Loop., , and . IEICE Trans. Electron., 91-C (12): 1971-1975 (2008)A Statistical Cell Delay Model for Estimating the 3σ Delay by Matching Kurtosis., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2932-2936 (2022)AMPS: Accelerating McPAT Power Evaluation Without Cycle-Accurate Simulations., , , and . IEEE Embed. Syst. Lett., 12 (1): 13-16 (2020)TYMER: A Yield-based Performance Model for Timing-speculation SRAM., , , , , and . DAC, page 1-6. IEEE, (2020)A Cross-Layer Power and Timing Evaluation Method for Wide Voltage Scaling., , , , and . DAC, page 1-6. IEEE, (2020)A Statistical Timing Model for Low Voltage Design Considering Process Variation., , , , , and . ICCAD, page 1-8. ACM, (2019)