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Disambiguation of "Chalamalasetti, Sai Rahul"

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PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference.

, , , , , , , , , , and . ASPLOS, page 715-731. ACM, (2019)

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Sai Li

Rahul Gupta

Sai Zhang

Sai Zhang

Sai Qian

 

Other publications of authors with the same name

Mixed Precision Quantization for ReRAM-based DNN Inference Accelerators., , , , , , , , , and 8 other author(s). ASP-DAC, page 372-377. ACM, (2021)A C++-embedded Domain-Specific Language for programming the MORA soft processor array., , , and . ASAP, page 141-148. IEEE Computer Society, (2010)Analysis and Modeling of Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures., , , , , , , , , and 1 other author(s). ICPE, page 79-90. ACM, (2019)FPGA Demonstrator of a Programmable Ultra-Efficient Memristor-Based Machine Learning Inference Accelerator., , , , , , , , , and 10 other author(s). ICRC, page 44-53. IEEE, (2019)PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference., , , , , , , , , and 1 other author(s). ASPLOS, page 715-731. ACM, (2019)High Level Programming for Heterogeneous Architectures., , , and . CoRR, (2014)A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model., , , and . FPL, page 534-538. IEEE, (2009)High Level Programming of Document Classification Systems for Heterogeneous Environments using OpenCL (Abstract Only)., , , , and . FPGA, page 274. ACM, (2015)Power/throughput/area efficient PIM-based reconfigurable array for parallel processing., , , and . SoCC, page 375-378. IEEE, (2008)Regular Expression Matching with Memristor TCAMs., , , , , , , , , and 2 other author(s). ICRC, page 1-11. IEEE, (2018)