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Design of 65 nm Sub-Threshold SRAM Using the Bitline Leakage Prediction Scheme and the Non-trimmed Sense Amplifier.

J. Wang, P. Chang, and C. Lin. IEICE Trans. Electron., 95-C (1): 172-175 (2012)

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Jing-Shyan Lin

Jinn-Rong Lee

Wang Wang

Linfang Wang

Investigation of the functions of 53BP1 in DNA demethylationL. Wang. Uni Marburg, (2009)

Hanchun Wang

Other publications of authors with the same name

Embedding Repeaters in Silicon IPs for Cross-IP Interconnections.J. Wang, K. Chang, C. Yeh, and S. Chang. IEEE Trans. Very Large Scale Integr. Syst., 21 (3): 597-601 (2013)An All-Digital Delay-Locked Loop Using an In-Time Phase Maintenance Scheme for Low-Jitter Gigahertz Operations.J. Wang, and C. Cheng. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (2): 395-404 (2015)High-Speed and Low-Power Design Techniques for TCAM Macros.C. Wang, J. Wang, and C. Yeh. IEEE J. Solid State Circuits, 43 (2): 530-540 (2008)Design of Subthreshold SRAMs for Energy-Efficient Quality-Scalable Video Applications.J. Wang, P. Chang, T. Tang, J. Chen, and J. Guo. IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (2): 183-192 (2011)Variable-length VLIW encoding for code size reduction in embedded processors.T. Shyu, B. Su, T. Lin, C. Yeh, J. Wang, and T. Chen. SoCC, page 296-299. IEEE, (2016)Charge-sharing alleviation and detection for CMOS domino circuits.S. Chang, C. Cheng, W. Jone, S. Lee, and J. Wang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (2): 266-280 (2001)A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications.C. Lin, J. Chen, H. Chang, Y. Yang, Y. Ou-Yang, M. Tsai, J. Guo, and J. Wang. IEEE J. Solid State Circuits, 42 (1): 170-182 (2007)Design of a 3-V 300-MHz low-power 8-b×8-b pipelined multiplier using pulse-triggered TSPC flip-flops.J. Wang, P. Yang, and D. Sheng. IEEE J. Solid State Circuits, 35 (4): 583-592 (2000)Low-voltage pulsewidth control loops for SOC applications.P. Yang, and J. Wang. IEEE J. Solid State Circuits, 37 (10): 1348-1351 (2002)Low-power fixed-width array multipliers.J. Wang, C. Kuo, and T. Yang. ISLPED, page 307-312. ACM, (2004)

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Disambiguation of "Wang, Jinn-Shyan"

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Design of 65 nm Sub-Threshold SRAM Using the Bitline Leakage Prediction Scheme and the Non-trimmed Sense Amplifier.

Please choose a person to relate this publication to

Jing-Shyan Lin

Jinn-Rong Lee

Wang Wang

Linfang Wang

Hanchun Wang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wang, Jinn-Shyan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design of 65 nm Sub-Threshold SRAM Using the Bitline Leakage Prediction Scheme and the Non-trimmed Sense Amplifier.

Please choose a person to relate this publication to

Jing-Shyan Lin

Jinn-Rong Lee

Wang Wang

Linfang Wang

Hanchun Wang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Design of 65 nm Sub-Threshold SRAM Using the Bitline Leakage Prediction Scheme and the Non-trimmed Sense Amplifier.