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Disambiguation of "Donato, Marco"

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On-chip deep neural network storage with multi-level eNVM.

, , , , , and . DAC, page 169:1-169:6. ACM, (2018)

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Jessica Donato

Donato Acocella

Donato Petito

Monika Marcotty

Johannes Marcour

 

Other publications of authors with the same name

NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories., , , , , and . HPCA, page 938-956. IEEE, (2022)A Scalable Bayesian Inference Accelerator for Unsupervised Learning., , , , , , , and . Hot Chips Symposium, page 1-27. IEEE, (2020)A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic., , , , , , and . ACM Great Lakes Symposium on VLSI, page 39-44. ACM, (2012)NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories., , , , , and . CoRR, (2021)A Simulation Framework for Analyzing Transient Effects Due to Thermal Noise in Sub-Threshold Circuits., , , and . ACM Great Lakes Symposium on VLSI, page 45-50. ACM, (2015)A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators., , , , , , , , , and . VLSI Circuits, page 34-. IEEE, (2019)MaxNVM: Maximizing DNN Storage Density and Inference Efficiency with Sparse Encoding and Error Mitigation., , , , , , and . MICRO, page 769-781. ACM, (2019)A 3mm2 Programmable Bayesian Inference Accelerator for Unsupervised Machine Perception using Parallel Gibbs Sampling in 16nm., , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference., , , , , , , , , and 1 other author(s). MICRO, page 830-844. ACM, (2021)9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET., , , , , , , , , and . ISSCC, page 158-160. IEEE, (2021)