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9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET.

, , , , , , , , , and . ISSCC, page 158-160. IEEE, (2021)

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Robomorphic computing: a design methodology for domain-specific accelerators parameterized by robot morphology., , , , , and . ASPLOS, page 674-686. ACM, (2021)A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management., , , , , , , , , and 4 other author(s). ISSCC, page 342-343. IEEE, (2023)SM6: A 16nm System-on-Chip for Accurate and Noise-Robust Attention-Based NLP Applications : The 33rd Hot Chips Symposium - August 22-24, 2021., , , , , , , , , and . HCS, page 1-13. IEEE, (2021)GoldenEye: A Platform for Evaluating Emerging Numerical Data Formats in DNN Accelerators., , , , and . DSN, page 206-214. IEEE, (2022)A Scalable Bayesian Inference Accelerator for Unsupervised Learning., , , , , , , and . Hot Chips Symposium, page 1-27. IEEE, (2020)EdgeBERT: Optimizing On-Chip Inference for Multi-Task NLP., , , , , , , , and . CoRR, (2020)VaPr: Variable-Precision Tensors to Accelerate Robot Motion Planning., , , , , , , and . IROS, page 6304-6309. (2023)14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration., , , , , , , , , and 19 other author(s). ISSCC, page 262-264. IEEE, (2024)CAMEL: Co-Designing AI Models and eDRAMs for Efficient On-Device Learning., , , , and . HPCA, page 861-875. IEEE, (2024)MASR: A Modular Accelerator for Sparse RNNs., , , , , , , and . PACT, page 1-14. IEEE, (2019)