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Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic.

, , and . IEEE Trans. Computers, 55 (9): 1104-1115 (2006)

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Comparing transient-fault effects on synchronous and on asynchronous circuits., , , , , and . IOLTS, page 29-34. IEEE Computer Society, (2009)Practical Evaluation of Fault Countermeasures on an Asynchronous DES Crypto Processor., , , , , and . IOLTS, page 125-130. IEEE Computer Society, (2006)Asynchronous Circuits Sensitivity to Fault Injection., , and . IOLTS, page 121-128. IEEE Computer Society, (2004)Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic., , and . IEEE Trans. Computers, 55 (9): 1104-1115 (2006)Case Study of a Fault Attack on Asynchronous DES Crypto-Processors., , , , and . FDTC, volume 4236 of Lecture Notes in Computer Science, page 88-97. Springer, (2006)Hardening Techniques against Transient Faults for Asynchronous Circuits., , and . IOLTS, page 129-134. IEEE Computer Society, (2005)Asynchronous circuits transient faults sensitivity evaluation., , and . DAC, page 863-868. ACM, (2005)Formal Analysis of Quasi Delay Insensitive Circuits Behavior in the Presence of SEUs., , and . IOLTS, page 113-120. IEEE Computer Society, (2007)Asynchronous Design: Fault Robustness and Security Characteristics., and . IOLTS, page 92-95. IEEE Computer Society, (2006)