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Disambiguation of "Leveugle, Régis"

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Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic.

, , and . IEEE Trans. Computers, 55 (9): 1104-1115 (2006)

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Régis Cartier

Jean-Marc Régis

Yann Régis-Gianas

Régis Delatouche

Régis Abeille

 

Other publications of authors with the same name

Chip level security: Why ? How ?. ICECS, page 25-26. IEEE, (2008)Software BIST capabilities of a symmetric cipher., , and . ICECS, page 414-417. IEEE, (2008)Laser-induced fault effects in security-dedicated circuits., , , , , , , , , and 9 other author(s). VLSI-SoC, page 1-6. IEEE, (2014)A New Approach to Control Flow Checking Without Program Modification., , and . FTCS, page 334-343. IEEE Computer Society, (1991)Optimized State Assignment of single fault Tolerant FSMs Based on SEC Codes.. DAC, page 14-18. ACM Press, (1993)A Flexible SoPC-based Fault Injection Environment., , and . DDECS, page 192-197. IEEE Computer Society, (2006)Cross Layer Fault Simulations for Analyzing the Robustness of RTL Designs in Airborne Systems., , , , , , , , and . DDECS, page 1-4. IEEE, (2020)Efficient synthesis of fault-tolerant controllers., , and . ED&TC, page 593. IEEE Computer Society, (1995)Using Application Profiling based on a Virtual Platform for SoC Fault Tolerance Assessment., , , , and . PRIME, page 225-228. IEEE, (2022)Secure Test with RSNs: Seamless Authenticated Extended Confidentiality., , , and . NEWCAS, page 1-4. IEEE, (2021)