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DDPMnet: All-Digital Pulse Density-Based DNN Architecture with 228 Gate Equivalents/MAC Unit, 28-TOPS/W and 1.5-TOPS/mm2 in 40nm., , , , , , и . CICC, стр. 1-2. IEEE, (2022)Relaxation Digital-to-Analog Converter with Radix-based Digital Correction., , и . ISCAS, стр. 1402-1406. IEEE, (2022)A 880 nW, 100 kS/s, 13 bit Differential Relaxation-DAC in 180 nm., , , , и . PRIME, стр. 269-272. IEEE, (2023)Emerging Relaxation and DDPM D/A Converters: Overview and Perspectives., , , и . MWSCAS, стр. 1-6. IEEE, (2022)Wake-Up Oscillators with pW Power Consumption in Dynamic Leakage Suppression Logic., , и . ISCAS, стр. 1-5. IEEE, (2019)A pW-Power Hz-Range Oscillator Operating With a 0.3-1.8-V Unregulated Supply., , , и . IEEE J. Solid State Circuits, 54 (5): 1487-1496 (2019)EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS., , , , , , , , , и 27 other автор(ы). ETS, стр. 1-6. IEEE, (2023)A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components., , , , , , и . Sensors, 22 (15): 5852 (2022)Correction: Zhang et al. A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components. Sensors 2022, 22, 5852., , , , , , и . Sensors, 22 (22): 8936 (2022)Fully Synthesizable, Rail-to-Rail Dynamic Voltage Comparator for Operation down to 0.3 V., , и . ISCAS, стр. 1-5. IEEE, (2018)