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Automatic enhanced CDFG generation based on runtime instrumentation.

Z. Yuan, Y. Ma, J. Bian, и K. Zhao. CSCWD, стр. 92-97. IEEE, (2013)

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Yuchun Li

Yuchun Ding

Yuzhao Ma

Characterization of higher order modes in optical fibersY. Ma. Uni Erlangen-Nürnberg, (2009)

Jingxiang Ma

Tsie Ma

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An integrated floorplanning with an efficient buffer planning algorithm.Y. Ma, X. Hong, S. Dong, S. Chen, Y. Cai, C. Cheng, и J. Gu. ISPD, стр. 136-142. ACM, (2003)Floorplanning with Abutment Constraints and L-Shaped/T-Shaped Blocks based on Corner Block List.Y. Ma, X. Hong, S. Dong, Y. Cai, C. Cheng, и J. Gu. DAC, стр. 770-775. ACM, (2001)Novel and efficient min cut based voltage assignment in gate level.T. Lin, S. Dong, S. Chen, Y. Ma, O. He, и S. Goto. ISQED, стр. 150-155. IEEE, (2011)Thermal-aware P/G TSV planning for IR drop reduction in 3D ICs.Z. Li, Y. Ma, Q. Zhou, Y. Cai, Y. Xie, и T. Huang. Integr., 46 (1): 1-9 (2013)LP based white space redistribution for thermal via planning and performance optimization in 3D ICs.X. Li, Y. Ma, X. Hong, S. Dong, и J. Cong. ASP-DAC, стр. 209-212. IEEE, (2008)Rethinking thermal via planning with timing-power-temperature dependence for 3D ICs.K. Wang, Y. Ma, S. Dong, Y. Wang, X. Hong, и J. Cong. ASP-DAC, стр. 261-266. IEEE, (2011)VLSI floorplanning with boundary constraints based on corner block list.Y. Ma, S. Dong, X. Hong, Y. Cai, C. Cheng, и J. Gu. ASP-DAC, стр. 509-514. ACM, (2001)Incremental power optimization for multiple supply voltage design.Y. Ma, X. Qiu, X. He, and X. Hong. ISQED, page 280-286. IEEE Computer Society, (2009)Relation-oriented resource allocation for multi-accelerator systems.T. Yu, B. Feng, M. Stillwell, J. Coutinho, W. Zhao, S. Liang, W. Luk, A. Wolf, and Y. Ma. ASAP, page 243-244. IEEE Computer Society, (2016)An effective buffer planning algorithm for IP based fixed-outline SOC placement.O. He, S. Dong, J. Bian, Y. Ma, and X. Hong. ACM Great Lakes Symposium on VLSI, page 564-569. ACM, (2007)