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A Reference-less Sense Amplifier to Sense pA Currents in Ferroelectric Tunnel Junction Memories.

, , and . MOCAST, page 1-4. IEEE, (2023)

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Multi-level memristive voltage divider: programming scheme trade-offs., , and . MEMSYS, page 259-268. ACM, (2018)System Architecture for Network-Attached FPGAs in the Cloud using Partial Reconfiguration., , , , , and . FPL, page 293-300. IEEE, (2019)Bridging the Gap between High-Performance, Cloud and Service-Oriented Computing., , and . FAS*W@SASO/ICAC, page 68-69. IEEE, (2019)Autonomous Driving in the Curriculum of Computer Architecture., , , and . EWME, page 11-16. IEEE, (2018)A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM., and . NORCAS, page 1-6. IEEE, (2019)Carry-free Addition in Resistive RAM Array: n-bit Addition in 22 Memory Cycles., and . ISVLSI, page 157-163. IEEE, (2021)Direct state transfer in MLC based memristive ReRAM devices for ternary computing., and . ECCTD, page 1-5. IEEE, (2020)Comparative study of usefulness of FeFET, FTJ and ReRAM technology for ternary arithmetic., , and . ICECS, page 1-6. IEEE, (2021)Comparison of a Binary Signed-Digit Adder with Conventional Binary Adder Circuits on Layout Level., , and . ARCS, volume 14842 of Lecture Notes in Computer Science, page 236-248. Springer, (2024)Herausforderungen der Technischen Informatik beim Unkonventionellen Rechnen.. GI Jahrestagung, volume P-154 of LNI, page 2224-2237. GI, (2009)