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Disambiguation of "Malik, Sharad"

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Constrained Sampling and Counting: Universal Hashing Meets SAT Solving.

, , , , , , , and . AAAI Workshop: Beyond NP, volume WS-16-05 of AAAI Technical Report, AAAI Press, (2016)978-1-57735-759-9.

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Sharad Chandra

Sharad Prasad

Shalaka Sharad Shah

Nishant Malik

David Malik

 

Other publications of authors with the same name

Specification and encoding of transaction interaction properties., , and . Formal Methods Syst. Des., 39 (2): 144-164 (2011)Model checking unbounded concurrent lists., , and . Int. J. Softw. Tools Technol. Transf., 18 (4): 375-391 (2016)System Level Design: Orthogonolization of Concerns and Platform-Based Design, , , , and . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (December 2000)Certified Timing Verification and the Transition Delay of a Logic Circuit., , , and . DAC, page 549-555. IEEE Computer Society Press, (1992)Syntax-Guided Synthesis for Lemma Generation in Hardware Model Checking., , and . VMCAI, volume 12597 of Lecture Notes in Computer Science, page 325-349. Springer, (2021)Optimization of embedded DSP programs using post-pass data-flow analysis., , , and . ICASSP, page 695-698. IEEE Computer Society, (1997)INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms., , , and . DAC, page 1-4. IEEE, (2023)A formal instruction-level GPU model for scalable verification., , , and . ICCAD, page 130. ACM, (2018)Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver., , , , and . DAC, page 747-750. ACM, (2002)Using a Communication Architecture Specification in an Application-Driven Retargetable Prototyping Platform for Multiprocessing., and . DATE, page 1244-1249. IEEE Computer Society, (2004)