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A Topological Search Algorithm for ATPG.

, и . DAC, стр. 502-508. IEEE Computer Society Press / ACM, (1987)

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Другие публикации лиц с тем же именем

Test Generation for Highly Sequential Scan-Testable Circuits Through Logic Transformation., , и . ITC, стр. 561-565. IEEE Computer Society, (1981)An Efficient Delay Test Generation System for Combinational Logic Circuits., и . DAC, стр. 522-528. IEEE Computer Society Press, (1990)The Influences of Fault Type and Topology on Fault Model Performance and the Implications to Test and Testable Design., и . DAC, стр. 673-678. IEEE Computer Society Press, (1990)Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams., , , и . DAC, стр. 417-420. ACM, (1991)A Deterministic Approach to Adjacency Testing for Delay Faults., и . DAC, стр. 351-356. ACM Press, (1989)A Method of Delay Fault Test Generation., и . DAC, стр. 90-95. ACM, (1988)Balanced Excitation and Its Effect on the Fortuitous Detection of Dynamic Defects., , , и . DATE, стр. 1066-1071. IEEE Computer Society, (2004)On the decline of testing efficiency as fault coverage approaches 100%., , , и . VTS, стр. 74-83. IEEE Computer Society, (1995)Function-Based Dynamic Compaction and its Impact on Test Set Sizes., , и . DFT, стр. 167-174. IEEE Computer Society, (2003)Iddq Testing for High Performance CMOS - The Next Ten Years., , , , и . ED&TC, стр. 578-583. IEEE Computer Society, (1996)