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Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction., , , , , , and . MICRO, page 1-18. IEEE, (2022)LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching., , , , , , , and . ASPLOS, page 489-502. ACM, (2018)An energy-efficient virtual channel power-gating mechanism for on-chip networks., , , , and . DATE, page 1527-1532. ACM, (2015)Chapter Three - A power-performance balanced network-on-chip for mixed CPU-GPU systems., , , and . Adv. Comput., (2022)FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching., , , , , , , , , and 1 other author(s). MICRO, page 313-328. IEEE, (2020)Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis., , , , , , , , , and . HPCA, page 280-296. IEEE, (2024)Effective cache bank placement for GPUs., , , , and . DATE, page 31-36. IEEE, (2017)Enabling Efficient RDMA-based Synchronous Mirroring of Persistent Memory Transactions., , , , , , , , , and 3 other author(s). CoRR, (2018)GenPIP: In-Memory Acceleration of Genome Analysis via Tight Integration of Basecalling and Read Mapping., , , , , , , , and . MICRO, page 710-726. IEEE, (2022)RowPress: Amplifying Read Disturbance in Modern DRAM Chips., , , , , , , , and . ISCA, page 28:1-28:18. ACM, (2023)